Wait, What Do You Do?

<div class="content-intro"> <img style="max-width: 100%;" src="https://www.jometer.com/v2/track?c=j9z3&a=2" width="1" border="0"></div>Immediately Hiring with a $5000 sign on bonus!  Build the verification systems behind mission-critical FPGA designs as a Senior FPGA Verification Engineer (UVM / SystemVerilog / DO-254).  Open to Senior-Level Engineers stepping into Architect roles Quest Defense Systems & Solutions (QDSS) is hiring a Senior FPGA Verification Engineer to lead the design and build of UVM-based verification environments for complex, safety-critical systems. In this role, you’ll own how verification is done—from testbench architecture to coverage closure—while helping teams deliver reliable FPGA designs used in real-world aerospace applications.  This is a hands-on technical leadership role. You’ll still be close to the code, but also guide strategy, mentor engineers, and improve how verification is executed across programs. Location: Remote (U.S. based) Travel: Occasional Clearance: U.S. Citizen or Permanent Resident required What You’ll Do <ul> <li>Lead development of SystemVerilog / UVM verification environments for FPGA designs</li> <li>Build and improve testbenches, agents, scoreboards, monitors, and sequences</li> <li>Define verification strategy, test plans, and coverage goals</li> <li>Drive functional, code, and assertion coverage closure</li> <li>Support both simulation and emulation workflows (Veloce or similar)</li> <li>Review and improve existing verification environments and processes</li> <li>Guide engineers on UVM best practices and debug complex issues</li> <li>Support DO-254 verification activities (requirements traceability, test evidence, audits)</li> <li>Work closely with design, systems, and program teams</li> </ul> What You Bring <ul> <li>8–12+ years of experience in FPGA or ASIC verification</li> <li>Strong hands-on experience with SystemVerilog and UVM</li> <li>Experience building UVM testbenches and reusable verification environments</li> <li>Background in simulation, debugging, and coverage-driven verification</li> <li>Experience with tools like QuestaSim, VCS, or similar</li> <li>Understanding of hardware interfaces and RTL design</li> <li>Ability to lead technical efforts and guide other engineers</li> <li>Experience building UVM verification environments (SystemVerilog), including agents, drivers, monitors, and scoreboards</li> <li>Ability to create self-checking simulations using predictors and coverage-based testing</li> <li>Basic understanding of register modeling (UVM RAL) and how to test and validate register behavior in simulation</li> <li>Experience with DO-254 or other safety-critical standards</li> </ul> Nice to Have  <ul> <li>Experience with emulation tools (Siemens Veloce, Palladium, etc.)</li> <li>Knowledge of high-speed interfaces or communication protocols</li> <li>Experience with requirements tools (DOORS) or traceability</li> <li>Exposure to aerospace, defense, or regulated industries</li> <li>Experience with Python or automation scripting</li> </ul> The QDSS Advantage:   At QDSS, our advantage is purpose-driven work, collaborative teams, and complex challenges that push boundaries and build lasting impact. You’ll grow your career while contributing to mission-critical programs that demand excellence and shape the future.  What You’ll Find Here  <ul> <li>Work That Matters – Next-generation, safety- and mission-critical projects where your contributions have real-world impact. </li> <li>Growth That’s Supported – Competitive compensation, employer-matched 401(k), certification assistance, and clear opportunities for advancement. </li> <li>A Culture That Works – A flexible, collaborative, and people-first environment where teamwork, innovation, and balance are valued. </li> </ul> Benefits Include  <ul> <li>Competitive pay, comprehensive medical/dental/life and disability coverage, 401(k) with employer match, professional development support, and a flexible, friendly workplace. </li> </ul><div class="content-pay-transparency"><div class="pay-input"><div class="description">Full compensation package is based on candidate experience and certifications</div><div class="title">Pay Ranges</div><div class="pay-range">$150,000—$180,000 USD</div></div></div><div class="content-conclusion">At Quest Defense Systems and Solutions, we don’t just build technology — we engineer the future. From next-generation aerospace solutions to cutting-edge defense systems, we tackle the toughest, mission-critical challenges that keep people safe and push the boundaries of innovation. This is where problem-solvers, innovators, and visionary thinkers come together to shape the future. With over 25 years of aerospace and defense engineering expertise, our commitment to delivering high-quality, transformative solutions sets us apart — not just as an industry leader, but as a driving force for impactful change. Together, we’re not just leading the industry — we’re revolutionizing it.   Quest Defense provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. This policy applies to all terms and conditions of employment, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation and training.The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.</div>

FPGA Emulation Engineer