Wait, What Do You Do?

<div class="content-intro"> <img style="max-width: 100%;" src="https://www.jometer.com/v2/track?c=j9z3&a=2" width="1" border="0"></div>Immediately Hiring with a $5000 sign on bonus!  Embark on a journey with QDSS at the forefront of technological innovation as we seek talented Engineers to shape the future of cutting-edge projects and contribute to a culture of excellence and creativity.  What we do matters.  Quest Defense Systems & Solutions (QDSS) is seeking a Senior FPGA Emulation Engineer to build and scale hardware-accelerated verification environments for complex, safety-critical FPGA systems. This role is focused on emulation and system-level validation, not just simulation. You’ll be working with platforms like Siemens Veloce (or similar) to accelerate verification, debug full-chip behavior, and enable validation of designs that can’t realistically be verified in simulation alone. If you enjoy working close to the hardware, solving performance bottlenecks, and making large-scale FPGA systems actually testable and debuggable, this is where you want to be. Location: Remote (U.S. based) Travel: Occasional Clearance: U.S. Citizen or Permanent Resident required What You’ll Do <ul> <li>Build and maintain FPGA emulation environments using Siemens Veloce or similar platforms</li> <li>Port and optimize RTL and test environments from simulation into emulation</li> <li>Debug complex system-level issues that only appear at scale or in hardware-accelerated environments</li> <li>Improve emulation performance, compile times, and runtime efficiency</li> <li>Integrate UVM-based environments into emulation workflows (not building UVM from scratch, but making it work in emulation)</li> <li>Support validation of high-speed interfaces and system-level data flows</li> <li>Collaborate with RTL, verification, and systems teams to resolve design and integration issues</li> <li>Enable full-chip and subsystem validation that cannot be achieved in simulation alone</li> <li>Support DO-254 verification activities, including traceability and test evidence where needed</li> <li>Help define best practices for emulation workflows across programs</li> </ul> What You Bring <ul> <li>5+ years of experience in FPGA/ASIC verification or validation</li> <li>Hands-on experience with hardware emulation platforms (Siemens Veloce, Cadence Palladium, Synopsys ZeBu, etc.)</li> <li>Experience bringing up designs in emulation environments and debugging system-level issues</li> <li>Strong understanding of RTL design and verification workflows</li> <li>Experience bridging simulation ↔ emulation environments</li> <li>Ability to analyze performance bottlenecks and optimize emulation runs</li> <li>Familiarity with SystemVerilog and UVM (integration level, not pure architect focus)</li> <li>Experience debugging interfaces, data paths, and timing-related issues</li> <li>Ability to work across teams and drive technical solutions</li> </ul> Nice to Have <ul> <li>Experience with DO-254 or other safety-critical standards</li> <li>Exposure to high-speed interfaces or communication protocols</li> <li>Experience with scripting/automation (Python, TCL, etc.)</li> <li>Experience supporting board bring-up or hardware validation</li> <li>Familiarity with coverage strategies across simulation and emulation</li> <li>Exposure to aerospace or defense programs</li> </ul> Tools & Technologies <ul> <li>Siemens Veloce (or equivalent emulation platform)</li> <li>SystemVerilog / UVM (integration level)</li> <li>Verilog / VHDL</li> <li>Python or scripting languages</li> <li>Simulation tools (QuestaSim, VCS, etc.)</li> <li>DOORS/requirements traceability tools (nice to have)</li> </ul> The QDSS Advantage:   At QDSS, our advantage is purpose-driven work, collaborative teams, and complex challenges that push boundaries and build lasting impact. You’ll grow your career while contributing to mission-critical programs that demand excellence and shape the future.  What You’ll Find Here  <ul> <li>Work That Matters – Next-generation, safety- and mission-critical projects where your contributions have real-world impact. </li> <li>Growth That’s Supported – Competitive compensation, employer-matched 401(k), certification assistance, and clear opportunities for advancement. </li> <li>A Culture That Works – A flexible, collaborative, and people-first environment where teamwork, innovation, and balance are valued. </li> </ul> Benefits Include  <ul> <li>Competitive pay, comprehensive medical/dental/life and disability coverage, 401(k) with employer match, professional development support, and a flexible, friendly workplace. </li> </ul><div class="content-pay-transparency"><div class="pay-input"><div class="description">Full compensation package is based on candidate experience and certifications</div><div class="title">Pay Ranges</div><div class="pay-range">$150,000—$180,000 USD</div></div></div><div class="content-conclusion">At Quest Defense Systems and Solutions, we don’t just build technology — we engineer the future. From next-generation aerospace solutions to cutting-edge defense systems, we tackle the toughest, mission-critical challenges that keep people safe and push the boundaries of innovation. This is where problem-solvers, innovators, and visionary thinkers come together to shape the future. With over 25 years of aerospace and defense engineering expertise, our commitment to delivering high-quality, transformative solutions sets us apart — not just as an industry leader, but as a driving force for impactful change. Together, we’re not just leading the industry — we’re revolutionizing it.   Quest Defense provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. This policy applies to all terms and conditions of employment, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation and training.The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.</div>

FPGA Verification Engineer