Back to jobs

3DIC Yield Analytics & Diagnostics Engineer, Staff

Hsinchu, Hsinchu City, TW

Pay
Pay not listed
Work setting
Not stated
Employment
Full-time — employment source
Employment type in the employer’s posting: FULL_TIME
From the employer’s posting
Apply at Qualcomm

What you’ll work on

Full posting
  • Analyze large-scale yield and diagnostics datasets to find systematic failure mechanisms

  • Run root-cause analysis by correlating electrical, process, design and assembly data

  • Perform advanced diagnostics on chiplets, stacked DRAM, TSVs, interposers and micro-bumps

  • Build yield analytics frameworks and dashboards for product and manufacturing visibility

  • Support new product introduction and high-volume manufacturing with yield risk monitoring

From the employer’s posting
Analyze large-scale yield and diagnostics datasets to identify systematic, random, and parametric failure mechanisms.
Drive structured root-cause analysis (RCA) and validate failure mechanisms through correlation of electrical, process, design, packaging, and assembly data.
Perform advanced diagnostics to isolate failure mechanisms across chiplets, logic die, stacked DRAM, TSVs, interposers, micro-bumps, hybrid bonding interfaces, and package substrates.
Develop analytics frameworks, dashboards, and yield-monitoring methodologies to improve product and manufacturing visibility.
Support New Product Introduction (NPI) and high-volume manufacturing (HVM) by identifying yield risks and establishing robust monitoring strategies.

What you’ll bring

All qualifications

Core experience

  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualification wording
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Education & alternatives
Qualifications * Bachelor's degree in Engineering or related field with 6+ years of relevant experience, OR Master's degree with 5+ years, OR Ph.D. with 4+ years. * Strong experience in semiconductor yield analytics, diagnostics, and manufacturing data analysis.
Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Tools in this posting

  • Python
  • SQL
  • Power BI
Source — Tool mentions in context
* Strong understanding of semiconductor test methodologies, failure analysis, and yield learning processes. * Proficiency with analytical tools such as Python, JMP, SQL, Yield Explorer, Power BI, or equivalent platforms. * Strong statistical analysis, problem-solving, and technical leadership skills.

Posting record

Report an error
Status in our records
Live
First seen by us
Aug 15, 2026 · 76 days ago
Recorded sightings
146
Last seen by us
Oct 30, 2026
Employer says posted
Jul 10, 2026

These dates show when we found the posting. Check the employer’s website to confirm it is still accepting applications.

Your next step

  • Have your resume and examples of relevant work ready.
  • Check the listed location, eligibility and core experience before starting.
  • Ask the employer about the pay range before committing time to the process.

Complete your application on careers.qualcomm.com. The employer’s form will show what is required.

Already applied? Track this application

Job description

View original posting ↗

## Company: Qualcomm Semiconductor Limited ## Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: We are seeking a highly motivated and experienced 3DIC Yield Analytics & Diagnostics Engineer, Staff to drive yield learning and diagnostics for next-generation 2.5D, 3DIC, chiplet, and heterogeneous integration technologies. This role focuses on leveraging advanced analytics, diagnostics methodologies, and large-scale semiconductor datasets to accelerate yield ramp, identify systematic yield limiters, and enable rapid root-cause resolution across wafer, package, assembly, and multi-die stack environments. The successful candidate will work closely with Product Engineering, Design, Test, Foundry, Packaging, Assembly, Reliability, and OSAT partners to develop scalable yield analytics frameworks and diagnostic methodologies that improve product quality, manufacturing efficiency, and time-to-volume. Key Responsibilities * Lead 3DIC yield analytics initiatives to drive systematic yield improvement across wafer fabrication, advanced packaging, assembly, and test operations. * Analyze large-scale yield and diagnostics datasets to identify systematic, random, and parametric failure mechanisms. * Develop and scale methodologies for analyzing heterogeneous data sources, including wafer sort, final test, package test, reliability, module-level, and stack-level data. * Perform advanced diagnostics to isolate failure mechanisms across chiplets, logic die, stacked DRAM, TSVs, interposers, micro-bumps, hybrid bonding interfaces, and package substrates. * Drive structured root-cause analysis (RCA) and validate failure mechanisms through correlation of electrical, process, design, packaging, and assembly data. * Analyze memory diagnostics data, including SRAM and stacked-DRAM bitmap analysis, to accelerate yield learning and failure localization. * Develop analytics frameworks, dashboards, and yield-monitoring methodologies to improve product and manufacturing visibility. * Apply statistical modeling, machine learning, and AI techniques to accelerate diagnostics, identify yield risks, and improve predictive yield learning. * Collaborate with cross-functional teams and external partners to implement corrective actions and drive continuous yield improvement. * Support New Product Introduction (NPI) and high-volume manufacturing (HVM) by identifying yield risks and establishing robust monitoring strategies. Qualifications * Bachelor's degree in Engineering or related field with 6+ years of relevant experience, OR Master's degree with 5+ years, OR Ph.D. with 4+ years. * Strong experience in semiconductor yield analytics, diagnostics, and manufacturing data analysis. * Proven track record of driving yield improvement in high-volume manufacturing environments. * Experience analyzing large-scale semiconductor datasets and developing data-driven solutions for complex yield challenges. * Strong understanding of semiconductor test methodologies, failure analysis, and yield learning processes. * Proficiency with analytical tools such as Python, JMP, SQL, Yield Explorer, Power BI, or equivalent platforms. * Strong statistical analysis, problem-solving, and technical leadership skills. * Excellent communication and cross-functional collaboration abilities. Preferred Qualifications * Deep understanding of 2.5D/3DIC architectures, chiplet integration, TSV/interposer technologies, hybrid bonding, and advanced packaging flows. * Experience building and scaling yield analytics frameworks, diagnostics methodologies, and data infrastructure. * Familiarity with process correlation, defect characterization, and failure-mechanism modeling. * Experience working with advanced packaging, assembly, OSAT, and foundry manufacturing environments. * Hands-on experience applying AI/ML techniques to semiconductor yield analytics and diagnostics. * Experience with DRAM, HBM, and stacked-memory diagnostics. * Knowledge of package reliability, failure analysis, and heterogeneous integration challenges. * Demonstrated technical leadership and ability to drive cross-functional yield improvement initiatives. Why Join Us This role offers the opportunity to directly influence the yield, quality, and manufacturability of Qualcomm's most advanced 3DIC and heterogeneous integration products. The successful candidate will play a critical role in developing next-generation yield analytics and diagnostics capabilities that accelerate technology learning and enable successful deployment of future chiplet-based and 3D integrated solutions. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.
Source details

View original posting ↗

Source notes

Source excerpts

Selected passages from the saved posting. Check the full description for conditions and exceptions.

Pay

No pay amount identified in the saved description.

Location & working pattern

Hsinchu, Hsinchu City, TW

* Develop and scale methodologies for analyzing heterogeneous data sources, including wafer sort, final test, package test, reliability, module-level, and stack-level data. * Perform advanced diagnostics to isolate failure mechanisms across chiplets, logic die, stacked DRAM, TSVs, interposers, micro-bumps, hybrid bonding interfaces, and package substrates. * Drive structured root-cause analysis (RCA) and validate failure mechanisms through correlation of electrical, process, design, packaging, and assembly data.
More source context
Preferred Qualifications * Deep understanding of 2.5D/3DIC architectures, chiplet integration, TSV/interposer technologies, hybrid bonding, and advanced packaging flows. * Experience building and scaling yield analytics frameworks, diagnostics methodologies, and data infrastructure.
Work authorization

No clear work-authorization passage found. Eligibility is unconfirmed.

See how this role fits your experience

Add your resume to compare the role’s scope, tools and requirements with your experience.

Find answers in the posting

AI
How answers work

AI selects complete passages from this posting. Check them for conditions and exceptions.

Uses this posting and your question. No profile needed.