Build and maintain high-performance runtime and compiler components for end-to-end inference optimization
Define and implement mappings of large-scale inference workloads onto NVIDIA's systems
Benchmark and profile to ensure efficient mapping of neural network graphs to inference hardware
Prototype new compilation and runtime techniques for spatial processors
Work with hardware architects to feed back software observations and codesign features
From the employer’s posting
Build, develop, and maintain high-performance runtime and compiler components, focusing on end-to-end inference optimization.
Define and implement mappings of large-scale inference workloads onto NVIDIA’s systems.
Benchmark, profile, and monitor key performance and efficiency metrics to ensure the compiler generates efficient mappings of neural network graphs to our inference hardware.
Prototype and evaluate new compilation and runtime techniques, including graph transformations, scheduling strategies, and memory/layout optimizations tailored to spatial processors.
Collaborate closely with hardware architects and design teams to feedback software observations, influence future architectures, and codesign features that unlock new performance and efficiency points.
Education & alternatives
What we need to see:
* MS or PhD in Computer Science, Electrical/Computer Engineering, or related field, or equivalent experience, with 6 years of relevant experience.
* Strong software engineering background with proficiency in systems level programming (e.g., C/C++ and/or Rust) and solid CS fundamentals in data structures, algorithms, and concurrency.
Open 5 monthsWe first saw this posting 177 days ago and it is still up. Roles open this long are often slow to fill or kept open to collect applications.
Status in our records
Live
First seen by us
May 12, 2026177 days ago
Recorded sightings
267
Last seen by us
Nov 5, 2026
May 12, 2026today
These dates show when we found the posting. Check the employer’s website to confirm it is still accepting applications.
How this job compares
Time since we first saw it
Day 177
670
Up longer than most. Similar jobs usually come down between day 6 and day 70.
Well past NVIDIA’s usual: its jobs come down by about day 36.
From 4,495 similar postings that came down, and 92 of NVIDIA’s. Coming down is not always a hire.
NVIDIA is hiring
59 open jobs
Open jobs by the week we first saw them, last 12 weeks.
Add your resume and we’ll mark which of these tools you already use, and point out anything in the posting that could rule you out.
C
C++
Rust
PyTorch
TensorFlow
Where the posting names them
* MS or PhD in Computer Science, Electrical/Computer Engineering, or related field, or equivalent experience, with 6 years of relevant experience.
* Strong software engineering background with proficiency in systems level programming (e.g., C/C++ and/or Rust) and solid CS fundamentals in data structures, algorithms, and concurrency.
* Hands on experience with compiler or runtime development, including IR design, optimization passes, or code generation.
* Experience with LLVM and/or MLIR, including building custom passes, dialects, or integrations.
* Familiarity with deep learning frameworks such as TensorFlow and PyTorch, and experience working with portable graph formats such as ONNX.
* Solid understanding of parallel and heterogeneous compute architectures, such as GPUs, spatial accelerators, or other domain specific processors.
Yes. We’ve followed 2 other Senior Machine Learning Applications and Compiler Engineer, LPX jobs there since May 2026. All 2 are still up.
Santa ClaraStill up after 183 days, first seen May 7
TorontoStill up after 183 days, first seen May 7
This jobUp 177 days so far, first seen May 12
May 7Today
About NVIDIA
People
About 42,000 in 2026, up 17% from the year before.Annual report (SEC Form 10-K)
Company
Listed as NVDA.
H-1B visas
978 approved for new hires in fiscal 2025.US Citizenship and Immigration Services
Demand for ML Engineer roles
New ML Engineer postings at the employers we follow are up 12% over the last 5 weeks compared with the 5 before.
August 17Last week
Each bar is one week of new postings. The darkest bars are the last 5 weeks.
Counted from the hiring pages we’ve followed for at least five weeks, so employers we add don’t look like growth. Updated weekly.
About the role
We file this job under ML Engineer, by the work the posting describes.
ML engineers put machine learning models into products. They write the code that trains, ships, serves and monitors models so a recommendation or prediction works for real users.
Postings ask for strong Python and software engineering, a framework such as PyTorch, cloud services, and more and more often experience with large language models.
A data scientist often works out which model to build; an ML engineer makes it run reliably in production.
US government figures for computer and information research scientists
Median yearly pay, May 2025
$140,300
Expected change, 2025 to 2035
21.8% more jobsagainst 3.5% for all jobs
The government has no code for ML engineers, so these figures are for the closest group, computer and information research scientists.
NVIDIA is seeking engineers to develop algorithms and optimizations for our LPX inference and compiler stack. You will work at the intersection of large-scale systems, compilers, and deep learning, crafting how neural network workloads map onto future NVIDIA platforms. This is your chance to be part of something outstandingly innovative!
What you’ll be doing:
* Build, develop, and maintain high-performance runtime and compiler components, focusing on end-to-end inference optimization.
* Define and implement mappings of large-scale inference workloads onto NVIDIA’s systems.
* Extend and integrate with NVIDIA’s SW ecosystem, contributing to libraries, tooling, and interfaces that enable seamless deployment of models across platforms.
* Benchmark, profile, and monitor key performance and efficiency metrics to ensure the compiler generates efficient mappings of neural network graphs to our inference hardware.
* Collaborate closely with hardware architects and design teams to feedback software observations, influence future architectures, and codesign features that unlock new performance and efficiency points.
* Prototype and evaluate new compilation and runtime techniques, including graph transformations, scheduling strategies, and memory/layout optimizations tailored to spatial processors.
* Publish and present technical work on novel compilation approaches for inference and related spatial accelerators at top tier ML, compiler, and computer architecture venues.
What we need to see:
* MS or PhD in Computer Science, Electrical/Computer Engineering, or related field, or equivalent experience, with 6 years of relevant experience.
* Strong software engineering background with proficiency in systems level programming (e.g., C/C++ and/or Rust) and solid CS fundamentals in data structures, algorithms, and concurrency.
* Hands on experience with compiler or runtime development, including IR design, optimization passes, or code generation.
* Experience with LLVM and/or MLIR, including building custom passes, dialects, or integrations.
* Familiarity with deep learning frameworks such as TensorFlow and PyTorch, and experience working with portable graph formats such as ONNX.
* Solid understanding of parallel and heterogeneous compute architectures, such as GPUs, spatial accelerators, or other domain specific processors.
* Strong analytical and debugging skills, with experience using profiling, tracing, and benchmarking tools to drive performance improvements.
* Excellent communication and collaboration skills, with the ability to work across hardware, systems, and software teams.
* Ideal candidates will have direct experience with MLIR based compilers or other multilevel IR stacks, especially in the context of graph based deep learning workloads.
Ways to stand out from the crowd:
* Prior work on spatial or dataflow architectures, including static scheduling, pipeline parallelism, or tensor parallelism at scale.
* Contributions to opensource ML frameworks, compilers, or runtime systems, particularly in areas related to performance or scalability.
* Demonstrated research impact, such as publications or presentations at conferences like PLDI, CGO, ASPLOS, ISCA, MICRO, MLSys, NeurIPS, or similar.
* Experience with large-scale AI distributed inference or training systems, including performance modeling and capacity planning for multi rack deployments.
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Pay
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Location & working pattern
Cambridge, England, GB
* Experience with large-scale AI distributed inference or training systems, including performance modeling and capacity planning for multi rack deployments.
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Work authorization
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